Format of OpenHCI Host Controller memory-mapped registers:
Offset	Size	Description	)
 00h	DWORD	"HcRevision"		OpenHCI revision (see #00903)
 04h	DWORD	"HcControl"		HC operating modes (see #00904)
 08h	DWORD	"HcCommandStatus"	command/status (see #00905)
 0Ch	DWORD	"HcInterruptStatus"	interrupt status (see #00906)
 10h	DWORD	"HcInterruptEnable"	enable interrupts (see #00907)
 14h	DWORD	"HcInterruptDisable"	disable interrupts (see #00907)
 18h	DWORD	"HcHCCA"		HC Communications Area (see #00908)
 1Ch	DWORD	"HcPeriodCurrentED"	Endpoint Descriptor addr (see #00909)
 20h	DWORD	"HcControlHeadED"	Control Endpoint Descriptor (see #00910)
 24h	DWORD	"HcControlCurrentED"	Control Endpoint Descriptor (see #00910)
 28h	DWORD	"HcBulkHeadED"		Bulk Endpoint Descriptor (see #00911)
 2Ch	DWORD	"HcBulkCurrentED"	Bulk Endpoint Descriptor (see #00911)
 30h	DWORD	"HcDoneHead"		last completed Xfer Descr. (see #00912)
 34h	DWORD	"HcFmInterval"		Frame bit-time interval (see #00913)
 38h	DWORD	"HcFmRemaining"		bit time remaining in Frame (see #00914)
 3Ch	DWORD	"HcFmNumber"		Frame Number (bits 15-0)
 40h	DWORD	"HcPeriodicStart"	earliest time to start periodic list
					(bits 13-0)
 44h	DWORD	"HcLSThreshold"		threshold for Low Speed transaction
					(bits 11-0)
 48h	DWORD	"HcRhDescriptorA"	Root Hub Descriptor A (see #00915)
 4Ch	DWORD	"HcRhDescriptorB"	Root Hub Descriptor B (see #00916)
 50h	DWORD	"HcRhStatus"		Root Hub status (see #00917)
 54h  N DWORDs	"HCRhPortStatus[1-N]"	Root Hub port status N (see #00918)
Note:	OpenHCI reserves a full 4K page of the systems address space for its
	  memory-mapped registers
SeeAlso: #00878,#00882,#F0085,#00966