Format of PCI Configuration Data for Intel 82439HX:
Offset	Size	Description	)
 00h 64 BYTEs	header (see #00878)
		(vender ID 8086h, device ID 1250h)
		(revision ID 00h = A0 stepping)
 40h 16 BYTEs	reserved
 50h	BYTE	PCI Control (see #01110)
 51h	BYTE	reserved
 52h	BYTE	cache control (see #01112)
 53h  3 BYTEs	reserved
 56h	BYTE	DRAM extended control (see #01115)
 57h	BYTE	DRAM control (see #01116)
 58h	BYTE	DRAM timing (see #01117)
 59h  7 BYTEs	Programmable Attribute Map registers 0-6 (see #01118)
 60h  8 BYTEs	DRAM Row Boundary registers 0-7
		each register N indicates cumulative amount of memory in rows
		  0-N (each 64 bits wide), in 4M units
 68h	BYTE	DRAM Row Type (see #01119)
		bits 0-7 indicate whether each row 0-7 contains EDO DRAM
		  instead of page-mode DRAM
 69h	BYTE	???
 6Ah  8 BYTEs	reserved
 72h	BYTE	System Management RAM control (see #01123)
 73h 29 BYTEs	reserved
 90h	BYTE	Error Command (see #01126)
 91h	BYTE	Error Status (see #01127) (read-only)
 92h	BYTE	Error Syndrome (read-only)
		latest non-zero ECC error syndrome
 93h 109 BYTEs	reserved
SeeAlso: #01108,#01229